[
############Laser Power#############
{ NAME: Laser_mode,     UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x44, SHIFT:  0, WIDTH:3,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x8,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Power_set,      UNITS:"A",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x46, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:.0006104,   OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ramp_up,        UNITS:"ms",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x48, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:10,      MAX:20000,  SCALE:0.1,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ramp_down,      UNITS:"ms",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x4A, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:10,      MAX:20000,  SCALE:0.1,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: On_time,        UNITS:"ms",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x4C, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:35000,  SCALE:1.0,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Off_time,       UNITS:"ms",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x4E, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:35000,  SCALE:1.0,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pulse_freq,     UNITS:"Hz",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x50, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:20,     MAX:0x3FFF, SCALE:0.1000,     OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pulse_duty,     UNITS:"%",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x52, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:0.00152591, OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Stitch_count,   UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x54, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:5000, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Tack_time,      UNITS:"ms",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x56, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:35000,  SCALE:0.1,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Wobble_length,  UNITS:"mm",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x58, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:16383,  SCALE:0.0024426,  OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Wobble_freq,    UNITS:"Hz",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x5A, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:10760,  SCALE:0.0928510,  OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Wave_number,    UNITS:"",    COUNT:1, MEMORY:0x20083E02, SHIFT: 0, WIDTH:8, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT, MIN:1, MAX:20,   SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Fp_control,     UNITS:"",    COUNT:1, MEMORY:0x20083E03, SHIFT: 0, WIDTH:8, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:1, MAX:0xFF, SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Index_ctrl,     UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xB0, SHIFT:  0, WIDTH:8,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED,    MIN:0,      MAX:0xFF,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Curr_prog,      UNITS:"",    COUNT:1, MEMORY:0x20083E00, SHIFT: 0, WIDTH:8, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT, MIN:0, MAX:10,   SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Curr_id,        UNITS:"",    COUNT:1, MEMORY:0x20083E01, SHIFT: 0, WIDTH:8, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT, MIN:1, MAX:20, SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: High_freq_mode,   UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x40, SHIFT:  3, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: High_freq_en,   UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x42, SHIFT:  1, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Cleaning_en,    UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x42, SHIFT:  0, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Laser_type,    UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x42, SHIFT:  3, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Head_cal_en,    UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x40, SHIFT:  5, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Plasma_start,   UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x40, SHIFT:  4, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,   SVIEW:ENABLE, SPROBE:ENABLE },


{ NAME: Laser_power,    UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x5C, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF,  SCALE:.0006104,   OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Emission_on,    UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x20, SHIFT:  0, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0x1,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Power_on,       UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x20, SHIFT:  11, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0x1,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Therm_bw_o,     UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x9C, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:65535,   SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Therm_bw_e,     UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x9E, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:65535,   SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Therm_thresh,   UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xA0, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:65535,   SCALE:.0006104,   OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Therm_model_o,  UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xA2, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:65535,   SCALE:.0006104,   OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Therm_model_e,  UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xA4, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:65535,   SCALE:.0006104,   OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },


##########Pulse Shape Points###########
{ NAME: Time_pt1,       UNITS:"ms",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x80, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:0.01,      OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Time_pt2,       UNITS:"ms",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x82, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:0.01,      OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Time_pt3,       UNITS:"ms",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x84, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:0.01,      OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Time_pt4,       UNITS:"ms",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x86, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:0.01,      OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Power_pt1,      UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x88, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:.0006104,  OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Power_pt2,      UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x8A, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:.0006104,  OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Power_pt3,      UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x8C, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:.0006104,  OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Power_pt4,      UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x8E, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:.0006104,  OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },

############Calibration###############
{ NAME: Max_curr_cw,    UNITS:"A",   COUNT:1,  MEMORY:0x20083E04, SHIFT: 0, WIDTH:32,  CACHING:NEVER, STORE_TYPE:FLOAT,    VIEW_TYPE:FLOAT, MIN:0, MAX:40,   SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Max_curr_hpp,   UNITS:"A",   COUNT:1,  MEMORY:0x20083E08, SHIFT: 0, WIDTH:32,  CACHING:NEVER, STORE_TYPE:FLOAT,    VIEW_TYPE:FLOAT, MIN:1, MAX:40,   SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Power_scale,    UNITS:"W",   COUNT:1,  MEMORY:0x20083E10, SHIFT: 0, WIDTH:32,  CACHING:NEVER, STORE_TYPE:FLOAT,    VIEW_TYPE:FLOAT, MIN:0, MAX:2500, SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Watt_curr_scale,UNITS:"",    COUNT:1,  MEMORY:0x20083E0C, SHIFT: 0, WIDTH:32,  CACHING:NEVER, STORE_TYPE:FLOAT,    VIEW_TYPE:FLOAT, MIN:0, MAX:65535,SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Watt_volt_scale,UNITS:"",    COUNT:1,  MEMORY:0x20083E18, SHIFT: 0, WIDTH:32,  CACHING:NEVER, STORE_TYPE:FLOAT,    VIEW_TYPE:FLOAT, MIN:0, MAX:65535,SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Min_setpoint,   UNITS:"",    COUNT:1,  MEMORY:0x20083E14, SHIFT: 0, WIDTH:32,  CACHING:NEVER, STORE_TYPE:FLOAT,    VIEW_TYPE:FLOAT, MIN:0, MAX:100,  SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },

{ NAME: Lp_bandwidth,   UNITS:"%",   COUNT:1,  FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x72, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF,  SCALE:0.0015259,   OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Enable_delay,   UNITS:"ms",  COUNT:1,  FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x74, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:0.01,         OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Model_gain,     UNITS:"",    COUNT:1,  FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x76, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:0.00015259,   OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Current_thresh, UNITS:"A",   COUNT:1,  FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x78, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:.0006104,     OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Alarm_coeff,    UNITS:"",    COUNT:1,  FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x7A, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:0.000015259,  OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pwr_pd_model,   UNITS:"mV",  COUNT:1,  FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x7C, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:0.050355,   OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Model_error,    UNITS:"",    COUNT:1,  FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x7E, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:SIGNED, VIEW_TYPE:SIGNED,   MIN:-32768,MAX:32767,   SCALE:1.0,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Model_curr,     UNITS:"A",   COUNT:1,  FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xAA, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, SCALE:0.0006104,    OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ramp_up_scale,  UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xB4, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:3277,    MAX:0xFFFF,  SCALE:0.0030518044, OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ramp_dn_scale,  UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xB6, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:3277,    MAX:0xFFFF,  SCALE:0.0030518044, OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

############Status Manager#############
{ NAME: Alarm_en,         UNITS:"", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x2C, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Alarm_polarity,   UNITS:"", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x0C, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Alarm_em_off,     UNITS:"", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x14, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Alarm_em_on,      UNITS:"", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x1C, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: Errors, 		  UNITS:"", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:0xFFFFFFFF, SCALE:1,   OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Trig_1_reset,     UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  29,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Nozzle_reset,     UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  28,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Thermal_limit,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  27,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Trig_1_powerup,   UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  26,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Nozzle_powerup,   UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  25,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Cur_reg_error,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  24,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Volt_reg_error,   UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  23,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Nozzle_shutdown,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  22,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Trig_1_shutdown,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  21,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fiber_shutdown,   UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  20,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ext_b_shutdown,   UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  19,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ext_a_shutdown,   UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  18,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pwr_a_dis_fault,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  17,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pwr_b_dis_fault,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  16,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Startup_fault,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  15,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ps_en_fault,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  14,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ext_intlk_fault,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  13,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fib_intlk_fault,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  12,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Intlk_diag_fault, UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  11,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pwr_over,         UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  10,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pwr_under,        UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  9,   WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Back_ref_alarm,   UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  8,   WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: FF2_alarm,        UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  7,   WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: FF1_alarm,        UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  6,   WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Dirty_win_alarm,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  5,   WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Plasma_alarm,     UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  4,   WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Overtemp_alarm,   UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  3,   WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Undertemp_alarm,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  2,   WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Wobble_alarm,     UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  1,   WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Guide_alarm,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x24, SHIFT:  0,   WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Emission_state,   UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x54, SHIFT:  0,   WIDTH:4,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Software_en,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x56, SHIFT:  0,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,        SCALE:1,        OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Clear_alarms,     UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x40, SHIFT:  0,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,  	  SCALE:1,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Test_enable,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x40, SHIFT:  1,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,   	  SCALE:1,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Emission_dis,     UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x40, SHIFT:  2,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,   	  SCALE:1,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Maintenance_w,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x40, SHIFT:  3,  WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,   	  SCALE:1,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fp_stat_dis,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x6E, SHIFT:  0,  WIDTH:5,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0x1F,   	  SCALE:1,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Trig_1_thresh,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x5A, SHIFT:  0,  WIDTH:16, CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:1,      MAX:0x64, 	  SCALE:1,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Nozzle_thresh,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x5C, SHIFT:  0,  WIDTH:16, CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:1,      MAX:0x64, 	  SCALE:1,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fp_disp_error,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x5E, SHIFT:  0,  WIDTH:6,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1F, 	  SCALE:1,        OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Enabled_errors,   UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x60, SHIFT:  0,  WIDTH:32, CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFFFFFF, SCALE:1,        OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: D_ok_i_thh,       UNITS:"A",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x64, SHIFT:  0,  WIDTH:16, CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, 	  SCALE:.0006104, OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: D_ok_ignore_time, UNITS:"ms", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x66, SHIFT:  0,  WIDTH:16, CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, 	  SCALE:1,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Icmd_max_set,     UNITS:"A",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x68, SHIFT:  0,  WIDTH:16, CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, 	  SCALE:.0006104, OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: D_ok_timeout,     UNITS:"ms", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x6A, SHIFT:  0,  WIDTH:16, CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF, 	  SCALE:1, 		  OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Faults,           UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x6C, SHIFT:  0,  WIDTH:6,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFF, 	  SCALE:1, 		  OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,   SVIEW:ENABLE, SPROBE:ENABLE },


{ NAME: Fpga_fault,       UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:  15, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fpga_fault_,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:  14, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fiber_ok,         UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:  13, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ext_a_ok,         UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:  12, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Key_ok,           UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:  11, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Noz_to_shank_ok,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:  10, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fiber_ok_,        UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:   9, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ext_b_ok_,        UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:   8, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Key_ok_,          UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:   7, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Trig_1_ok_,       UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:   6, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Trig_2_ok_,       UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:   5, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Safe_a,           UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:   4, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Safe_b_,          UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:   3, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: All_safe,         UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:   2, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: All_safe_,        UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:   1, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Por_ok,           UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x44, SHIFT:   0, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Driver_ok,        UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x46, SHIFT:   7, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ps_en,            UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x46, SHIFT:   6, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Switch_en_,       UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x46, SHIFT:   5, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Neg_latch_ok_,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x46, SHIFT:   4, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Rem_start_ok,     UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x46, SHIFT:   3, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Rem_start_ok_,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x46, SHIFT:   2, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ps_enabled,       UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x46, SHIFT:   1, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Switch_enabled_,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:2, FPGA.REG:0x46, SHIFT:   0, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
	
################GPIO################
{ NAME: Uplink_ok,        UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x20, SHIFT:  9, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Downlink_ok,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x20, SHIFT:  8, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Gp_output,        UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x20, SHIFT:  5, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Gp_input,         UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x20, SHIFT:  4, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Purge_status,     UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x20, SHIFT:  3, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Gl_out,   	      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x20, SHIFT:  2, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Gas_detected,     UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x20, SHIFT:  1, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Shield_g_status,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x20, SHIFT:  0, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Shield_on_delay,  UNITS:"s",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x72, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:100,  MAX:10000,  SCALE:.001,       OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Shield_off_delay, UNITS:"s",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x44, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:100,  MAX:10000,  SCALE:.001,       OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Rel_ver,   	  	  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x80, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:999,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Purge_on_time,    UNITS:"s",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x82, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:999,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Nozzle_type,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x7C, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Temp_a,           UNITS:"°C", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x46, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:-.002025,   OFFSET:140.857, UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Temp_b,           UNITS:"°C", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x48, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:-.002025,   OFFSET:140.857, UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Temp_warn_h_th,   UNITS:"°C", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x78, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:-.002025,   OFFSET:140.857, UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Temp_h_thresh,    UNITS:"°C", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x66, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:-.002025,   OFFSET:140.857, UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Plasma_bw,        UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x7A, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.0015259,   OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },																																									
{ NAME: Ff_log_pd,        UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x4A, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Br_log_pd,        UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x4C, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ff2_log_pd,       UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x4E, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: P_log_pd,         UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x50, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pwr_pd,           UNITS:"mV", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x52, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.050355,    OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pwr_pd_gain,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x54, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFF,   SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ff_h_thresh,      UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x56, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Br_h_thresh,      UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x58, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ff2_h_thresh,     UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x5A, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Plasma_a_thresh,  UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xA6, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Plasma_s_thresh,  UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xA8, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Plasma_cl_thresh, UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xB2, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Plasma_timeout,   UNITS:"ms", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xAC, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:0.1,    OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Plasma_detect,    UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xAE, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ambient_detect,   UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xBA, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ambient_start,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xBC, SHIFT:  0, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:0X1,    SCALE:1,    OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Win_h_thresh,     UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x64, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pwr_pd_min,       UNITS:"mV", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x6A, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:.050355,    OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Br_en_time,       UNITS:"ms", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x6E, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Unit_model_type,  UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x40, SHIFT:  4, WIDTH:2,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x3,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },  
{ NAME: Disable_purge,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x40, SHIFT:  2, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },  
{ NAME: Buzzer_enable,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x40, SHIFT:  1, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Buzzer_volume,    UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x7E, SHIFT:  0, WIDTH:10,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,   MIN:0,    MAX:0x3E8,  SCALE:.1,         OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Buzzer_mode,      UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x7E, SHIFT:  10, WIDTH:3,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,   MIN:0,    MAX:0x7,    SCALE:1,         OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Buzzer_source,    UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x7E, SHIFT:  13, WIDTH:3,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,   MIN:0,    MAX:0x7,    SCALE:1,         OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Gl_enable,        UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x40, SHIFT:  0, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Gl_intlk_dis,     UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x40, SHIFT:  3, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },  
{ NAME: Gl_low_duty,      UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x5C, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Gl_high_duty,     UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x6C, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fan1_status,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x20, SHIFT:  7, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fan2_status,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x20, SHIFT:  6, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fan_duty_cycle,   UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x5E, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0xFFFF, SCALE:.001526,    OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fan_type_info,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x42, SHIFT:  2, WIDTH:2,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,    MAX:0x3,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fp_led_status,    UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x60, SHIFT:  0, WIDTH:5,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0x1F,   SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fp_art_rev,       UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x70, SHIFT:  4, WIDTH:4,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0xF,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fp_fpga_rev,      UNITS:"",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:3, FPGA.REG:0x70, SHIFT:  0, WIDTH:4,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,    MAX:0xF,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },

################################
			
################Wobble#################
{ NAME: Line_dir,     UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x40, SHIFT:  0, WIDTH:1,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0x1, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Act_amp,      UNITS:"mm", COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x42, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:0.0024426,    OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Act_freq,     UNITS:"Hz",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x44, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:0.0928510,  OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Position,     UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x50, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Feedback,     UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x52, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Error,        UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x54, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Wob_offset,   UNITS:"mm",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x48, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:SIGNED, VIEW_TYPE:FLOAT,    MIN:-3882, MAX:3882, SCALE:0.0007728,  OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
																			
{ NAME: Feed_est,     UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x56, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Error_est,    UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x58, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Wobble_tune,  UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x5A, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Wobble_gain,  UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x5C, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Error_window, UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x5E, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Comp_ramp,    UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x46, SHIFT:  0, WIDTH:8,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFF, SCALE:0.352112676, OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Comp_deadzone,UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x62, SHIFT:  0, WIDTH:8,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFF, SCALE:0.352112676, OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Comp_shift,   UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x60, SHIFT:  0, WIDTH:8,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFF, SCALE:0.352112676, OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Power_comp_en,UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x40, SHIFT:  6, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Comp_enabled, UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0x42, SHIFT:  2, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Comp_factor,  UNITS:"%",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:4, FPGA.REG:0x64, SHIFT:  0, WIDTH:16,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, MAX:0xFFFF, SCALE:0.00152591, OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Ramp_up_line,   UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xC2, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:2,     MAX:40000,  SCALE:1.0,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ramp_down_line, UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xC4, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:2,     MAX:40000,  SCALE:1.0,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Line_time,      UNITS:"",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:5, FPGA.REG:0xC0, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:20,    MAX:60000,  SCALE:1.0,        OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

################################

############## Front Panel #################

{ NAME: Laser_pwr_min,  UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x52, SHIFT:  0, WIDTH:11,  CACHING:NEVER,  STORE_TYPE:SIGNED,   VIEW_TYPE:FLOAT,    MIN:-999, 	 MAX:1023,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Laser_pwr_max,  UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x54, SHIFT:  0, WIDTH:15,  CACHING:NEVER,  STORE_TYPE:SIGNED,   VIEW_TYPE:FLOAT,    MIN:-999, 	 MAX:9999,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Three_dig_min,  UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x56, SHIFT:  0, WIDTH:8,   CACHING:NEVER,  STORE_TYPE:SIGNED,   VIEW_TYPE:FLOAT,    MIN:-99, 	 MAX:127,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Three_dig_max,  UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x58, SHIFT:  0, WIDTH:11,  CACHING:NEVER,  STORE_TYPE:SIGNED,   VIEW_TYPE:FLOAT,    MIN:-99, 	 MAX:999,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Two_dig_min,    UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x5A, SHIFT:  0, WIDTH:5,   CACHING:NEVER,  STORE_TYPE:SIGNED,   VIEW_TYPE:FLOAT,    MIN:-9, 	 MAX:15,      SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Two_dig_max,    UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x5C, SHIFT:  0, WIDTH:8,   CACHING:NEVER,  STORE_TYPE:SIGNED,   VIEW_TYPE:FLOAT,    MIN:-9, 	 MAX:99,      SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Upd_laser_pwr,  UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x5E, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:SIGNED,   VIEW_TYPE:SIGNED,   MIN:-16384, MAX:16383,   SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Upd_3_dig,      UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x60, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:SIGNED,   VIEW_TYPE:SIGNED,   MIN:-1024,  MAX:1023,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Upd_2_dig,      UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x62, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:SIGNED,   VIEW_TYPE:SIGNED,   MIN:-128,   MAX:127,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Upd_2_dig_r,    UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x62, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Upd_mode,       UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x64, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Upd_params,     UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x66, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0xFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:ENABLE },


{ NAME: Disp_power,     UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x46, SHIFT:  0, WIDTH:32,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFFFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Disp_dig3,      UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x4A, SHIFT:  0, WIDTH:24,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Disp_dig2,      UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x4E, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Disp_mode,      UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x50, SHIFT:  0, WIDTH:16,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Disp_config,    UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x42, SHIFT:  0, WIDTH:32,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFFF, SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fp_unit_led,    UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x42, SHIFT:  0, WIDTH:3,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, 	 MAX:0x7,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Fp_unit_led_dis,UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x40, SHIFT:  5, WIDTH:3,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x7,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Dig2_ldp,       UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x42, SHIFT:  3, WIDTH:2,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, 	 MAX:0x3,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Dig3_ldp,       UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x42, SHIFT:  5, WIDTH:3,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, 	 MAX:0x7,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Mode_ldp,       UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x42, SHIFT:  8, WIDTH:2,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, 	 MAX:0x3,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pwr_ldp,        UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x42, SHIFT:  10, WIDTH:4,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,   MIN:0, 	 MAX:0xF,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Dig2_rdp,       UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x44, SHIFT:  0, WIDTH:2,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, 	 MAX:0x3,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Dig3_rdp,       UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x44, SHIFT:  2, WIDTH:3,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, 	 MAX:0x7,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Mode_rdp,       UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x44, SHIFT:  5, WIDTH:2,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, 	 MAX:0x3,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Pwr_rdp,        UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x44, SHIFT:  7, WIDTH:4,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0, 	 MAX:0xF,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Button_ack,     UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x40, SHIFT:  0, WIDTH:1,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1,     SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Disp_control,   UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x40, SHIFT: 0, WIDTH:5,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:FLOAT,    MIN:0,      MAX:0x1F,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,   UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,   SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Button_status,  UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x20, SHIFT:  1, WIDTH:7,   CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0x7F,    SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:DISABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:DISABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

{ NAME: Firmware_rev,  UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x6C, SHIFT:  0, WIDTH:24,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFFFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ip_addr_0,     UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x70, SHIFT:  0, WIDTH:32,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFFFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ip_addr_1,     UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x74, SHIFT:  0, WIDTH:32,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFFFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ip_addr_2,     UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x78, SHIFT:  0, WIDTH:32,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFFFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },
{ NAME: Ip_addr_3,     UNITS:"",    COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x7C, SHIFT:  0, WIDTH:32,  CACHING:NEVER,  STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0,      MAX:0xFFFFFFFF,  SCALE:1,          OFFSET:0,       UREAD:ENABLE, UWRITE:ENABLE,  UVIEW:ENABLE, UPROBE:ENABLE, SREAD:ENABLE, SWRITE:ENABLE,  SVIEW:ENABLE, SPROBE:ENABLE },

############################################


##############Common Arch###################
{ NAME: authMethod,         UNITS:"U8",  COUNT:1, MEMORY:0x10007F75,                        SHIFT: 0, WIDTH:8,  CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:15,  SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: unitLocked,         UNITS:"U8",  COUNT:1, MEMORY:0x20083E22,                        SHIFT: 0, WIDTH:8, CACHING:NEVER, STORE_TYPE:UNSIGNED,  VIEW_TYPE:UNSIGNED, MIN:0, MAX:1,   SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: lockCombo,          UNITS:"U16", COUNT:1, MEMORY:0x20083E24,                        SHIFT: 0, WIDTH:16, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:9990,SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: testModeCombo,      UNITS:"U32", COUNT:1, MEMORY:0x20083E2C,                        SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:99999,SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: oemVendor,          UNITS:"U8",  COUNT:1, MEMORY:0x20083E23,                        SHIFT: 0, WIDTH:8, CACHING:NEVER, STORE_TYPE:UNSIGNED,  VIEW_TYPE:UNSIGNED, MIN:0, MAX:1,   SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: frontPanelLock,     UNITS:"U8",  COUNT:1, MEMORY:0x20083E2A,                        SHIFT: 0, WIDTH:8, CACHING:NEVER, STORE_TYPE:UNSIGNED,  VIEW_TYPE:UNSIGNED, MIN:0, MAX:1,   SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: cmdPortDisable,     UNITS:"U8",  COUNT:1, MEMORY:0x20083E2B,                        SHIFT: 0, WIDTH:8, CACHING:NEVER, STORE_TYPE:UNSIGNED,  VIEW_TYPE:UNSIGNED, MIN:0, MAX:1,   SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: maintenanceTime,    UNITS:"s",   COUNT:1, MEMORY:0x20083E30,                        SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:3600, MAX:3600000,   SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: fpMaxPowerCw,       UNITS:"W",   COUNT:1, MEMORY:0x20083E40,                        SHIFT: 0, WIDTH:16, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:1000, MAX:3000,      SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: fpMaxPowerHpp,      UNITS:"W",   COUNT:1, MEMORY:0x20083E42,                        SHIFT: 0, WIDTH:16, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:1000, MAX:4000,      SCALE:1, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },

{ NAME: fpgaRevMaj,         UNITS:"U8",  COUNT:1,  FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x50, SHIFT: 8, WIDTH:8,  CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:SIGNED,   MIN:0, MAX:0xFF,       SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: fpgaRevMin,         UNITS:"U8",  COUNT:1,  FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x50, SHIFT: 0, WIDTH:8,  CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:SIGNED,   MIN:0, MAX:0xFF,       SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: fpgaSubversion,     UNITS:"U16", COUNT:1,  FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x54,  SHIFT: 0, WIDTH:16,  CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:SIGNED,  MIN:0, MAX:0xFFFF,     SCALE:1.000000,       OFFSET:0.000000,  UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: firmUpdated,        UNITS:"U8",  COUNT:1, MEMORY:0,                        SHIFT: 0, WIDTH:8,  CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:1,  SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: firmInternal,       UNITS:"U8",  COUNT:1, MEMORY:0,                        SHIFT: 0, WIDTH:8,  CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:1,  SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },

{ NAME: lcIntstatus,          UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x20, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: lcIntenable,          UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x10, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: lcInthigh,            UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x28, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: lcIntlow,             UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x30, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: lcIntedge,            UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x18, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: lcIntlevel,	          UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:6, FPGA.REG:0x38, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },


{ NAME: commModRev,         UNITS:"U16",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x00, SHIFT: 0, WIDTH:16, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:0xFFFF,     SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: commModType,        UNITS:"U16",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x02, SHIFT: 0, WIDTH:16, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:0xFFFF,     SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: commIntWidth,       UNITS:"U6",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x04, SHIFT: 0, WIDTH: 6, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:0x3F,       SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:DISABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:DISABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: commIntActive,      UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x08, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: commIntRequest,     UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x18, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: commIntStatus,      UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x20, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: commIntEnable,      UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x10, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: commIntHigh,        UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x28, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: commIntLow,         UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x30, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: commIntLevel,       UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:0, FPGA.REG:0x38, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },

{ NAME: probModRev,         UNITS:"U16",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:1, FPGA.REG:0x00, SHIFT: 0, WIDTH:16, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:0xFFFF,     SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: probModType,        UNITS:"U16",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:1, FPGA.REG:0x02, SHIFT: 0, WIDTH:16, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:0xFFFF,     SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ NAME: probIntWidth,       UNITS:"U6",   COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:1, FPGA.REG:0x04, SHIFT: 0, WIDTH: 6, CACHING:NEVER, STORE_TYPE:UNSIGNED, VIEW_TYPE:UNSIGNED, MIN:0, MAX:0x3F,       SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ name: probIntActive,      UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:1, FPGA.REG:0x08, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ name: probIntEnable,      UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:1, FPGA.REG:0x10, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ name: probIntHigh,        UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:1, FPGA.REG:0x28, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ name: probIntLow,         UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:1, FPGA.REG:0x30, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },
{ name: probIntLevel,       UNITS:"U32",  COUNT:1, FPGA.DEV:0, FPGA.NODE:0, FPGA.MOD:1, FPGA.REG:0x38, SHIFT: 0, WIDTH:32, CACHING:NEVER, STORE_TYPE:BITSET,   VIEW_TYPE:BITSET,   MIN:0, MAX:0xFFFFFFFF, SCALE:1.000000, OFFSET:0.000000,  UREAD:ENABLE, UWRITE:ENABLE, UVIEW:ENABLE, UPROBE:DISABLE, SREAD:ENABLE, SWRITE:ENABLE, SVIEW:ENABLE, SPROBE:DISABLE },

]
